Choosing the Right Components

Selection Criteria

Availability

• Check stock at multiple distributors
• Avoid single-source components
• Watch out for lead times
• Plan for alternative components

Lifecycle

• Prefer "Active" components not "NRND" (Not Recommended for New Designs)
• Check manufacturer roadmap
• Avoid end-of-life components

Technical Parameters

• Temperature range sufficient for application
• Adequate tolerances
• Reliability rating (MTBF)

Component Sources

Authorized Distributors:

• Mouser, Digi-Key, Farnell, RS Components
• Authenticity guarantee
• Complete documentation

Avoid:

• Alibaba for critical components
• Sources without traceability
• Refurbished components without certification

Footprint and Symbols

• Use verified libraries (manufacturer recommended)
• Verify exact dimensions with datasheet
• Include 3D model for mechanical verification

Schematic Design Principles

Organization and Clarity

Hierarchical Structure

• Divide schematic into functional blocks
• One page per subsystem
• Logical flow left→right, top→bottom

Consistent Naming

• Clear component references (U1, R15, C23)
• Descriptive net names (VCC_3V3, SPI_MOSI)
• Avoid generic names (NET1, NET2)

Documentation

• Notes for critical values
• Explanations for non-obvious circuits
• References to application notes

Decoupling and Filtering

Decoupling Capacitors

• Minimum 100nF per IC power pin
• Add bulk capacitor (10-100µF) per rail
• Place as close to pin as possible

Power Filtering

• Ferrite beads for domain isolation
• LC filters for high sensitivity (ADC, RF)

Circuit Protection

ESD Protection

• TVS diodes on all external connections
• ESD clamps on interfaces (USB, Ethernet)

Overcurrent

• Fuse or polyfuse on power input
• Current limiting for outputs

PCB Configuration

Layer Stackup

2 Layers (simple)

• Top: Components + routing
• Bottom: Ground plane + routing
• Use: Simple circuits, low-frequency
• Cost: Minimum

4 Layers (standard)

• Top: Components + signal routing
• Inner 1: Continuous ground plane
• Inner 2: Power plane
• Bottom: Signal routing + components
• Use: MCU, mixed-signal
• Cost: Moderate

6+ Layers (complex)

• Dedicated layers for high-speed
• Controlled impedance traces
• Use: DDR, PCIe, RF
• Cost: Premium

Fundamental Design Rules

Trace Width and Spacing

• Minimum 6mil/6mil for standard
• 4mil/4mil for fine pitch
• Calculate width for current (IPC-2221)

Via Specifications

• Standard: 0.3mm drill, 0.6mm pad
• Micro-via: 0.15mm, for HDI
• Via-in-pad for BGA (filled & capped)

Clearance

• High voltage: 0.5mm per 100V minimum
• Creepage for wet environments

Professional Routing Techniques

General Rules

Avoid 90° Angles

• Use 45° or curves
• 90° creates reflections and current concentration

Continuous Reference Plane

• Traces need return path
• Avoid split planes under critical signals
• Stitching via for layer change

Length Matching

• Required for parallel buses (DDR, LVDS)
• Tolerance: ±50-100mil typical
• Use meandering for compensation

High-Speed Design

Controlled Impedance

• USB: 90Ω differential
• Ethernet: 100Ω differential
• HDMI: 100Ω differential
• Single-ended: 50Ω typical

Termination

• Series termination at source
• Parallel termination at destination (AC coupled)
• Thevenin for buses

Electromagnetic Compatibility (EMC)

Grounding

• Star grounding for analog/digital
• Ferrite bead between domains
• Via stitching at board edge

Shielding

• Copper pour on all layers
• EMI shields for RF sections

PCB Thermal Management

Heat Sources

Voltage Regulators

• Linear: Pdis = (Vin - Vout) × Iout
• Switching: More efficient but switching losses

Processors and FPGAs

• TDP declared in datasheet
• Dynamic power varies with workload

Power Stages

• MOSFETs, power transistors
• Driver circuits

Dissipation Techniques

Thermal Vias

• Array under hot components
• Connect to copper plane
• Size: 0.3-0.5mm, pitch 1-1.5mm

Copper Pours

• Extended planes for heat spreading
• Connected to ground for efficiency

Thermal Relief

• Pattern for pads connected to planes
• Facilitates soldering

External Components

• Heatsinks mounted on PCB
• Thermal interface material (TIM)
• Forced ventilation if necessary

Thermal Simulation

• FEA analysis for temperature distribution
• Hotspot identification
• Validation with thermal camera on prototype

Production Optimization

Standard DFM Rules

Annular Ring

• Minimum 0.15mm copper around via
• Prevents defects during drilling

Solder Mask

• Expansion 0.05-0.1mm from pad
• Minimum dam 0.1mm between pads

Silkscreen

• Minimum font 0.8mm height
• Minimum line 0.15mm
• Don't overlap pads

Panelization

• V-scoring or tab routing
• Fiducials for pick & place
• Tooling holes for fixture

Assembly Preparation (DFA)

Component Orientation

• Consistent polarity (cathode down)
• Pin 1 in same corner
• Facilitates visual inspection

Reflow Access

• Space for tombstoning prevention
• Uniform thermal distribution
• Large components don't shadow small ones

Testability

• Accessible test points
• Programming headers
• Debug connectors (JTAG, SWD)

Quality Through Verification

Design Rule Check (DRC)

Automatic Checks:

• Clearance violations
• Minimum trace width
• Insufficient annular ring
• Unconnected nets
• Duplicate references

Electrical Rule Check (ERC)

Schematic Checks:

• Output connected to output (conflict)
• Unconnected pins
• Floating power nets
• Missing decoupling

SPICE Simulation

What We Simulate:

• Analog circuit operation
• Frequency response
• Transients and stability
• Monte Carlo for tolerances

Signal Integrity Analysis

High-Speed Checks:

• Eye diagram for buses
• Crosstalk between traces
• Reflection and ringing
• PDN (Power Delivery Network) analysis

Design Review Checklist

• All nets connected
• Complete decoupling
• Thermal vias where needed
• Controlled impedance for high-speed
• Testpoints and programming headers
• Fiducials for assembly
• Complete BOM with availability verified
• 3D model verified for enclosure

From Files to Physical PCB

Production File Generation

Gerber Files (RS-274X)

• One file per layer (copper, mask, silk)
• Drill file (Excellon format)
• Pick & place file (centroid)
• BOM (Bill of Materials)

Output Verification

• Gerber viewer (ViewPlot, GerbView)
• Compare with original design
• Verify drill sizes

PCB Fabricator Selection

For Prototype:

• PCBWay, JLCPCB, Eurocircuits
• Turnaround: 3-7 days
• Cost: €5-50 for small batch

For Production:

• Certified fabricators (ISO, UL)
• Incoming inspection capabilities
• Lot traceability

Order Specifications

• Layer count
• Thickness (1.6mm standard)
• Copper weight (1oz standard, 2oz for power)
• Surface finish (HASL, ENIG, OSP)
• Solder mask color
• Silkscreen color
• Controlled impedance (if required)

Assembly (PCBA)

Options:

• Manual soldering for prototype
• Turnkey assembly (PCB fab + components + SMT)
• Partial kit (you supply some components)

Your PCB Design Partner

A well-designed PCB is the difference between a successful product and a problematic one. Investment in correct design from the start saves time and money long-term.

Final Checklist

Before Sending to Fabrication:

• DRC and ERC clean
• Simulations validated
• Review with second engineer
• BOM availability verified
• 3D fit in enclosure confirmed
• Stackup discussed with fabricator
• Test plan prepared

Torcip PCB Services

Complete Design:

• Specifications consulting
• Professional schematic and layout
• Simulation and verification
• Complete documentation

Rapid Prototyping:

• PCB fabrication
• Component assembly
• Bring-up and testing
• Debug and iterations

Production:

• Transfer to series production
• Certification support
• Cost optimization

Experience:

• Hundreds of completed projects
• From simple to 12+ layers
• High-speed, RF, power electronics

Contact us for an evaluation of your project and receive a quote for PCB design or prototyping.